Re: [Qemu-devel] [PATCH RFC v3 13/27] COLO RAM: Flush cached RAM into SVM's memory

* zhanghailiang (zhang.zhanghaili...@huawei.com) wrote: > On 2015/3/12 3:08, Dr. David Alan Gilbert wrote: > >* zhanghailiang (zhang.zhanghaili...@huawei.com) wrote: > >>We only need to flush RAM that is both dirty on PVM and SVM since > >>last checkpoint. Besides, we must ensure flush RAM cache be

Re: [Qemu-devel] [PATCH RFC v3 13/27] COLO RAM: Flush cached RAM into SVM's memory

* zhanghailiang (zhang.zhanghaili...@huawei.com) wrote: > On 2015/3/12 4:07, Dr. David Alan Gilbert wrote: > >* zhanghailiang (zhang.zhanghaili...@huawei.com) wrote: > >>We only need to flush RAM that is both dirty on PVM and SVM since > >>last checkpoint. Besides, we must ensure flush RAM cache be

Re: [Qemu-devel] [PATCH RFC v3 13/27] COLO RAM: Flush cached RAM into SVM's memory

* zhanghailiang (zhang.zhanghaili...@huawei.com) wrote: > We only need to flush RAM that is both dirty on PVM and SVM since > last checkpoint. Besides, we must ensure flush RAM cache before load > device state. > > Signed-off-by: zhanghailiang a > Signed-off-by: Lai Jiangshan > Signed-off-by: Li

Re: [Qemu-devel] [PATCH RFC v3 13/27] COLO RAM: Flush cached RAM into SVM's memory

On 2015/3/12 4:07, Dr. David Alan Gilbert wrote: * zhanghailiang (zhang.zhanghaili...@huawei.com) wrote: We only need to flush RAM that is both dirty on PVM and SVM since last checkpoint. Besides, we must ensure flush RAM cache before load device state. Actually with a follow up to my previous

Re: [Qemu-devel] [PATCH RFC v3 13/27] COLO RAM: Flush cached RAM into SVM's memory

On 2015/3/12 3:08, Dr. David Alan Gilbert wrote: * zhanghailiang (zhang.zhanghaili...@huawei.com) wrote: We only need to flush RAM that is both dirty on PVM and SVM since last checkpoint. Besides, we must ensure flush RAM cache before load device state. Signed-off-by: zhanghailiang a Signed-off

Re: [Qemu-devel] [PATCH RFC v3 13/27] COLO RAM: Flush cached RAM into SVM's memory

* zhanghailiang (zhang.zhanghaili...@huawei.com) wrote: > We only need to flush RAM that is both dirty on PVM and SVM since > last checkpoint. Besides, we must ensure flush RAM cache before load > device state. Actually with a follow up to my previous question, can you explain the 'both' in that d

[Qemu-devel] [PATCH RFC v3 13/27] COLO RAM: Flush cached RAM into SVM's memory

We only need to flush RAM that is both dirty on PVM and SVM since last checkpoint. Besides, we must ensure flush RAM cache before load device state. Signed-off-by: zhanghailiang a Signed-off-by: Lai Jiangshan Signed-off-by: Li Zhijian Signed-off-by: Yang Hongyang Signed-off-by: Gonglei --- ar