On 2017年01月16日 16:18, Peter Xu wrote:
On Mon, Jan 16, 2017 at 03:52:10PM +0800, Jason Wang wrote:
On 2017年01月16日 15:43, Peter Xu wrote:
On Mon, Jan 16, 2017 at 01:53:54PM +0800, Jason Wang wrote:
On 2017年01月13日 11:06, Peter Xu wrote:
Before this one we only invalidate context cache when we
On Mon, Jan 16, 2017 at 03:52:10PM +0800, Jason Wang wrote:
>
>
> On 2017年01月16日 15:43, Peter Xu wrote:
> >On Mon, Jan 16, 2017 at 01:53:54PM +0800, Jason Wang wrote:
> >>
> >>On 2017年01月13日 11:06, Peter Xu wrote:
> >>>Before this one we only invalidate context cache when we receive context
> >>>
On Mon, Jan 16, 2017 at 03:52:10PM +0800, Jason Wang wrote:
>
>
> On 2017年01月16日 15:43, Peter Xu wrote:
> >On Mon, Jan 16, 2017 at 01:53:54PM +0800, Jason Wang wrote:
> >>
> >>On 2017年01月13日 11:06, Peter Xu wrote:
> >>>Before this one we only invalidate context cache when we receive context
> >>>
On 2017年01月16日 15:43, Peter Xu wrote:
On Mon, Jan 16, 2017 at 01:53:54PM +0800, Jason Wang wrote:
On 2017年01月13日 11:06, Peter Xu wrote:
Before this one we only invalidate context cache when we receive context
entry invalidations. However it's possible that the invalidation also
contains a do
On Mon, Jan 16, 2017 at 01:53:54PM +0800, Jason Wang wrote:
>
>
> On 2017年01月13日 11:06, Peter Xu wrote:
> >Before this one we only invalidate context cache when we receive context
> >entry invalidations. However it's possible that the invalidation also
> >contains a domain switch (only if cache-m
On 2017年01月13日 11:06, Peter Xu wrote:
Before this one we only invalidate context cache when we receive context
entry invalidations. However it's possible that the invalidation also
contains a domain switch (only if cache-mode is enabled for vIOMMU).
So let's check for CM before replaying?
Before this one we only invalidate context cache when we receive context
entry invalidations. However it's possible that the invalidation also
contains a domain switch (only if cache-mode is enabled for vIOMMU). In
that case we need to notify all the registered components about the new
mapping.
Si