Re: [Qemu-devel] [PATCH RFC v2 0/9] hw/pci: set irq without selecting INTx pin

2013-10-02 Thread Alex Williamson
On Wed, 2013-10-02 at 16:05 +0300, Marcel Apfelbaum wrote: > On Wed, 2013-10-02 at 15:58 +0300, Michael S. Tsirkin wrote: > > On Wed, Oct 02, 2013 at 03:41:25PM +0300, Marcel Apfelbaum wrote: > > > Note: Added RFC because not all affected devices were > > > checked yet. > > > > What do you

Re: [Qemu-devel] [PATCH RFC v2 0/9] hw/pci: set irq without selecting INTx pin

2013-10-02 Thread Marcel Apfelbaum
On Wed, 2013-10-02 at 15:58 +0300, Michael S. Tsirkin wrote: > On Wed, Oct 02, 2013 at 03:41:25PM +0300, Marcel Apfelbaum wrote: > > Note: Added RFC because not all affected devices were > > checked yet. > > What do you have in mind exactly? Sanity test for *all* modified devices. Any other

[Qemu-devel] [PATCH RFC v2 0/9] hw/pci: set irq without selecting INTx pin

2013-10-02 Thread Marcel Apfelbaum
Note: Added RFC because not all affected devices were checked yet. Interrupt pin is selected and saved into PCI_INTERRUPT_PIN register during device initialization. Devices should not call directly qemu_set_irq and specify the INTx pin. Added pci_* wrappers to replace qemu_set_irq, qemu_ir

Re: [Qemu-devel] [PATCH RFC v2 0/9] hw/pci: set irq without selecting INTx pin

2013-10-02 Thread Michael S. Tsirkin
On Wed, Oct 02, 2013 at 03:41:25PM +0300, Marcel Apfelbaum wrote: > Note: Added RFC because not all affected devices were > checked yet. What do you have in mind exactly? > Interrupt pin is selected and saved into PCI_INTERRUPT_PIN > register during device initialization. Devices should no