> -Original Message-
> From: Pavel Fedin [mailto:p.fe...@samsung.com]
> Sent: Monday, 25 May, 2015 6:27 PM
> To: 'Eric Auger'; qemu-devel@nongnu.org; shlomopongr...@gmail.com;
> Shlomo Pongratz
> Subject: RE: [Qemu-devel] [PATCH RFC V2 2/4] Implment GIC-5
Hi!
> > +static const uint8_t gic_lpi_ids[] = {
> > +0x44, 0x00, 0x00, 0x00, 0x093, 0xB4, 0x3B, 0x00, 0x0D, 0xF0, 0x05, 0xB1
> > +};
Found one more thing. Shouldn't there be 0x091 instead of 0x093 (5th byte =
PIDR0) ? 0x93
is ITS while REDIST is 0x91.
Kind regards,
Pavel Fedin
Expert Engin
Hi Pavel,
No problem.
Best regards,
S.P.
On Friday, May 22, 2015, Pavel Fedin wrote:
> Hello!
>
> > Please find some more comments inline.
>
> Since there are notes about code style, i would add one more thing.
> structures of v3
> implementation keep old names (like GICState), and i would
Hello!
> Please find some more comments inline.
Since there are notes about code style, i would add one more thing. structures
of v3
implementation keep old names (like GICState), and i would suggest to rename
these things
(like GICv3State) in order to avoid confusion.
Kind regards,
Pavel Fe
Hi Shlomo,
On 05/06/2015 04:04 PM, shlomopongr...@gmail.com wrote:
> From: Shlomo Pongratz
>
> Implement GIC-500 from GICv3 family for arm64
>
> This patch is a first step toward 128 cores support for arm64.
>
> At first only 64 cores are supported for two reasons:
> First the largest integer t
From: Shlomo Pongratz
Implement GIC-500 from GICv3 family for arm64
This patch is a first step toward 128 cores support for arm64.
At first only 64 cores are supported for two reasons:
First the largest integer type has the size of 64 bits and modifying
essential data structures in order to sup
