On Mon, 2016-10-10 at 17:36 +0300, Marcel Apfelbaum wrote:
> > What's the advantage in using ARI to stuff more than eight
> > of anything that's not Endpoint Devices in a single slot?
> >
> > I mean, if we just fill up all 32 slots in a PCIe Root Bus
> > with 8 PCIe Root Ports each we already end
On Mon, 2016-10-10 at 17:15 +0300, Marcel Apfelbaum wrote:
> > > > 2) can you really only plug a pcie-root-port (ioh3420)
> > > > into a pxb-pcie? Or will it accept anything that pcie.0
> > > > accepts?
> > >
> > > It supports only PCI Express Root Ports. It does not
> > > support Integrated Devic
On 10/10/2016 03:02 PM, Andrea Bolognani wrote:
On Tue, 2016-10-04 at 12:52 -0600, Alex Williamson wrote:
I'ts all just idle number games, but what I was thinking of was the
difference between plugging a bunch of root-port+upstream+downstreamxN
combos directly into pcie-root (flat), vs. pluggin
On 10/10/2016 02:09 PM, Andrea Bolognani wrote:
On Wed, 2016-10-05 at 12:17 +0300, Marcel Apfelbaum wrote:
2) can you really only plug a pcie-root-port (ioh3420)
into a pxb-pcie? Or will it accept anything that pcie.0
accepts?
It supports only PCI Express Root Ports. It does not
support Integr
On Tue, 2016-10-04 at 12:52 -0600, Alex Williamson wrote:
> > I'ts all just idle number games, but what I was thinking of was the
> > difference between plugging a bunch of root-port+upstream+downstreamxN
> > combos directly into pcie-root (flat), vs. plugging the first into
> > pcie-root, and
On Wed, 2016-10-05 at 12:17 +0300, Marcel Apfelbaum wrote:
> > 2) can you really only plug a pcie-root-port (ioh3420)
> > into a pxb-pcie? Or will it accept anything that pcie.0
> > accepts?
>
> It supports only PCI Express Root Ports. It does not
> support Integrated Devices.
So no PCI Express S
On 10/04/2016 07:25 PM, Laine Stump wrote:
On 10/04/2016 11:45 AM, Alex Williamson wrote:
On Tue, 4 Oct 2016 15:59:11 +0100
"Daniel P. Berrange" wrote:
On Mon, Sep 05, 2016 at 06:24:48PM +0200, Laszlo Ersek wrote:
On 09/01/16 15:22, Marcel Apfelbaum wrote:
+2.3 PCI only hierarchy
+=
On 10/04/2016 08:54 PM, Laine Stump wrote:
On 10/04/2016 12:10 PM, Laine Stump wrote:
On 10/04/2016 11:40 AM, Laszlo Ersek wrote:
Small correction to your wording though: you don't want to attach the
DMI-PCI bridge to the PXB device, but to the extra root bus provided by
the PXB.
This made
On 10/04/16 20:08, Laine Stump wrote:
> On 10/04/2016 12:43 PM, Laszlo Ersek wrote:
>> On 10/04/16 18:10, Laine Stump wrote:
>>> On 10/04/2016 11:40 AM, Laszlo Ersek wrote:
On 10/04/16 16:59, Daniel P. Berrange wrote:
> On Mon, Sep 05, 2016 at 06:24:48PM +0200, Laszlo Ersek wrote:
All
On Tue, 4 Oct 2016 14:08:45 -0400
Laine Stump wrote:
> On 10/04/2016 12:43 PM, Laszlo Ersek wrote:
> > On 10/04/16 18:10, Laine Stump wrote:
> >> On 10/04/2016 11:40 AM, Laszlo Ersek wrote:
> >>> On 10/04/16 16:59, Daniel P. Berrange wrote:
> On Mon, Sep 05, 2016 at 06:24:48PM +0200, L
On 10/04/2016 12:43 PM, Laszlo Ersek wrote:
On 10/04/16 18:10, Laine Stump wrote:
On 10/04/2016 11:40 AM, Laszlo Ersek wrote:
On 10/04/16 16:59, Daniel P. Berrange wrote:
On Mon, Sep 05, 2016 at 06:24:48PM +0200, Laszlo Ersek wrote:
All valid *high-level* topology goals should be permitted /
On 10/04/2016 12:10 PM, Laine Stump wrote:
On 10/04/2016 11:40 AM, Laszlo Ersek wrote:
Small correction to your wording though: you don't want to attach the
DMI-PCI bridge to the PXB device, but to the extra root bus provided by
the PXB.
This made me realize something - the root bus on a pxb
On 10/04/16 18:10, Laine Stump wrote:
> On 10/04/2016 11:40 AM, Laszlo Ersek wrote:
>> On 10/04/16 16:59, Daniel P. Berrange wrote:
>>> On Mon, Sep 05, 2016 at 06:24:48PM +0200, Laszlo Ersek wrote:
On 09/01/16 15:22, Marcel Apfelbaum wrote:
> +2.3 PCI only hierarchy
> +
On 10/04/2016 11:45 AM, Alex Williamson wrote:
On Tue, 4 Oct 2016 15:59:11 +0100
"Daniel P. Berrange" wrote:
On Mon, Sep 05, 2016 at 06:24:48PM +0200, Laszlo Ersek wrote:
On 09/01/16 15:22, Marcel Apfelbaum wrote:
+2.3 PCI only hierarchy
+==
+Legacy PCI devices can be plu
On 10/04/2016 11:40 AM, Laszlo Ersek wrote:
On 10/04/16 16:59, Daniel P. Berrange wrote:
On Mon, Sep 05, 2016 at 06:24:48PM +0200, Laszlo Ersek wrote:
On 09/01/16 15:22, Marcel Apfelbaum wrote:
+2.3 PCI only hierarchy
+==
+Legacy PCI devices can be plugged into pcie.0 as In
On Tue, 4 Oct 2016 15:59:11 +0100
"Daniel P. Berrange" wrote:
> On Mon, Sep 05, 2016 at 06:24:48PM +0200, Laszlo Ersek wrote:
> > On 09/01/16 15:22, Marcel Apfelbaum wrote:
> > > +2.3 PCI only hierarchy
> > > +==
> > > +Legacy PCI devices can be plugged into pcie.0 as Integr
On 10/04/16 16:59, Daniel P. Berrange wrote:
> On Mon, Sep 05, 2016 at 06:24:48PM +0200, Laszlo Ersek wrote:
>> On 09/01/16 15:22, Marcel Apfelbaum wrote:
>>> +2.3 PCI only hierarchy
>>> +==
>>> +Legacy PCI devices can be plugged into pcie.0 as Integrated Devices or
>>> +into DM
On Mon, Sep 05, 2016 at 06:24:48PM +0200, Laszlo Ersek wrote:
> On 09/01/16 15:22, Marcel Apfelbaum wrote:
> > +2.3 PCI only hierarchy
> > +==
> > +Legacy PCI devices can be plugged into pcie.0 as Integrated Devices or
> > +into DMI-PCI bridge. PCI-PCI bridges can be plugged int
On Thu, 2016-09-15 at 17:20 +0300, Marcel Apfelbaum wrote:
> > Just catching up on mail after vacation and read this thread. Thanks
> > Marcel for writing this document (I guess a v1 is coming soon).
>
> Yes, I am sorry but I got caught up with other stuff and I am
> going to be in PTO for a week,
On 09/15/2016 11:38 AM, Andrew Jones wrote:
On Wed, Sep 07, 2016 at 10:39:28PM +0300, Marcel Apfelbaum wrote:
On 09/07/2016 08:55 PM, Laine Stump wrote:
On 09/07/2016 04:06 AM, Marcel Apfelbaum wrote:
[snip]
Good point, maybe libvirt can avoid adding switches unless the user
explicitly
asked
On Wed, Sep 07, 2016 at 10:39:28PM +0300, Marcel Apfelbaum wrote:
> On 09/07/2016 08:55 PM, Laine Stump wrote:
> > On 09/07/2016 04:06 AM, Marcel Apfelbaum wrote:
[snip]
> > > Good point, maybe libvirt can avoid adding switches unless the user
> > > explicitly
> > > asked for them. I checked and it
Hi,
> > Good point, maybe libvirt can avoid adding switches unless the user
> > explicitly
> > asked for them. I checked and it a actually works fine in QEMU.
> So, *is* there any downside to doing this?
I don't think so.
The only issue I can think of when it comes to multifunction is hotplug
Hi,
> I had understood that the xhci could be a legacy PCI device or a PCI
> Express device depending on the socket it was plugged into (or was that
> possibly just someone doing some hand-waving over the fact that
> obscuring the PCI Express capabilities effectively turns it into a
> legacy
On 09/07/2016 03:39 PM, Marcel Apfelbaum wrote:
On 09/07/2016 08:55 PM, Laine Stump wrote:
On 09/07/2016 04:06 AM, Marcel Apfelbaum wrote:
On 09/07/2016 09:21 AM, Gerd Hoffmann wrote:
Hi,
ports, if that's allowed). For example:
- 1-32 ports needed: use root ports only
- 33-64 ports need
On 09/07/2016 08:55 PM, Laine Stump wrote:
On 09/07/2016 04:06 AM, Marcel Apfelbaum wrote:
On 09/07/2016 09:21 AM, Gerd Hoffmann wrote:
Hi,
ports, if that's allowed). For example:
- 1-32 ports needed: use root ports only
- 33-64 ports needed: use 31 root ports, and one switch with 2-32
d
On 09/07/2016 07:08 PM, Alex Williamson wrote:
On Wed, 7 Sep 2016 11:06:45 +0300
Marcel Apfelbaum wrote:
On 09/07/2016 09:21 AM, Gerd Hoffmann wrote:
Hi,
ports, if that's allowed). For example:
- 1-32 ports needed: use root ports only
- 33-64 ports needed: use 31 root ports, and one sw
On 09/07/2016 03:04 AM, Gerd Hoffmann wrote:
Hi,
Side note for usb: In practice you don't want to use the tons of
uhci/ehci controllers present in the original q35 but plug xhci into one
of the pcie root ports instead (unless your guest doesn't support xhci).
I've wondered about that recent
On 09/07/2016 04:06 AM, Marcel Apfelbaum wrote:
On 09/07/2016 09:21 AM, Gerd Hoffmann wrote:
Hi,
ports, if that's allowed). For example:
- 1-32 ports needed: use root ports only
- 33-64 ports needed: use 31 root ports, and one switch with 2-32
downstream ports
I expect you rarely need a
On Wed, 7 Sep 2016 11:06:45 +0300
Marcel Apfelbaum wrote:
> On 09/07/2016 09:21 AM, Gerd Hoffmann wrote:
> > Hi,
> >
> ports, if that's allowed). For example:
>
> - 1-32 ports needed: use root ports only
>
> - 33-64 ports needed: use 31 root ports, and one switch wit
On 09/07/2016 11:06 AM, Laszlo Ersek wrote:
On 09/07/16 08:21, Gerd Hoffmann wrote:
Hi,
ports, if that's allowed). For example:
- 1-32 ports needed: use root ports only
- 33-64 ports needed: use 31 root ports, and one switch with 2-32
downstream ports
I expect you rarely need any switch
On 09/07/16 08:21, Gerd Hoffmann wrote:
> Hi,
>
ports, if that's allowed). For example:
- 1-32 ports needed: use root ports only
- 33-64 ports needed: use 31 root ports, and one switch with 2-32
downstream ports
>
> I expect you rarely need any switches. You can
On 09/07/2016 09:21 AM, Gerd Hoffmann wrote:
Hi,
ports, if that's allowed). For example:
- 1-32 ports needed: use root ports only
- 33-64 ports needed: use 31 root ports, and one switch with 2-32
downstream ports
I expect you rarely need any switches. You can go multifunction with
the p
On 09/07/2016 10:53 AM, Laszlo Ersek wrote:
On 09/06/16 13:35, Gerd Hoffmann wrote:
Hi,
[...]
Side note: the linux kernel allocates io space nevertheless, so
checking /proc/ioports after boot doesn't tell you what the firmware
did.
Yeah, we've got to convince Linux to stop doing that.
On 09/06/16 13:35, Gerd Hoffmann wrote:
> Hi,
>
>>> +Plug only legacy PCI devices as Root Complex Integrated Devices
>>> +even if the PCIe spec does not forbid PCIe devices.
>>
>> I suggest "even though the PCI Express spec does not forbid PCI Express
>> devices as Integrated Devices". (Detail i
On 09/06/16 20:32, Alex Williamson wrote:
> On Tue, 6 Sep 2016 21:14:11 +0300
> Marcel Apfelbaum wrote:
>
>> On 09/06/2016 06:38 PM, Alex Williamson wrote:
>>> On Thu, 1 Sep 2016 16:22:07 +0300
>>> Marcel Apfelbaum wrote:
+5. Device assignment
+
+Host devices
Hi,
> > Side note for usb: In practice you don't want to use the tons of
> > uhci/ehci controllers present in the original q35 but plug xhci into one
> > of the pcie root ports instead (unless your guest doesn't support xhci).
>
> I've wondered about that recently. For i440fx machinetypes if yo
Hi,
> >> ports, if that's allowed). For example:
> >>
> >> - 1-32 ports needed: use root ports only
> >>
> >> - 33-64 ports needed: use 31 root ports, and one switch with 2-32
> >> downstream ports
I expect you rarely need any switches. You can go multifunction with
the pcie root ports. Whic
On 09/06/2016 06:38 PM, Alex Williamson wrote:
On Thu, 1 Sep 2016 16:22:07 +0300
Marcel Apfelbaum wrote:
Proposes best practices on how to use PCIe/PCI device
in PCIe based machines and explain the reasoning behind them.
Signed-off-by: Marcel Apfelbaum
---
Hi,
Please add your comments on
On Tue, 6 Sep 2016 21:14:11 +0300
Marcel Apfelbaum wrote:
> On 09/06/2016 06:38 PM, Alex Williamson wrote:
> > On Thu, 1 Sep 2016 16:22:07 +0300
> > Marcel Apfelbaum wrote:
> >
> >> Proposes best practices on how to use PCIe/PCI device
> >> in PCIe based machines and explain the reasoning beh
On 09/06/2016 09:32 PM, Alex Williamson wrote:
On Tue, 6 Sep 2016 21:14:11 +0300
Marcel Apfelbaum wrote:
On 09/06/2016 06:38 PM, Alex Williamson wrote:
On Thu, 1 Sep 2016 16:22:07 +0300
Marcel Apfelbaum wrote:
Proposes best practices on how to use PCIe/PCI device
in PCIe based machines an
On Thu, 1 Sep 2016 16:22:07 +0300
Marcel Apfelbaum wrote:
> Proposes best practices on how to use PCIe/PCI device
> in PCIe based machines and explain the reasoning behind them.
>
> Signed-off-by: Marcel Apfelbaum
> ---
>
> Hi,
>
> Please add your comments on what to add/remove/edit to make
On 09/06/2016 02:35 PM, Gerd Hoffmann wrote:
Hi,
+Plug only legacy PCI devices as Root Complex Integrated Devices
+even if the PCIe spec does not forbid PCIe devices.
I suggest "even though the PCI Express spec does not forbid PCI Express
devices as Integrated Devices". (Detail is good!)
On 09/06/2016 04:31 PM, Laszlo Ersek wrote:
On 09/05/16 22:02, Marcel Apfelbaum wrote:
On 09/05/2016 07:24 PM, Laszlo Ersek wrote:
On 09/01/16 15:22, Marcel Apfelbaum wrote:
Proposes best practices on how to use PCIe/PCI device
in PCIe based machines and explain the reasoning behind them.
Sig
On 09/06/2016 07:35 AM, Gerd Hoffmann wrote:
While talking about integrated devices: There is docs/q35-chipset.cfg,
which documents how to mimic q35 with integrated devices as close and
complete as possible.
Usage:
qemu-system-x86_64 -M q35 -readconfig docs/q35-chipset.cfg $args
Side note fo
On 09/05/16 22:02, Marcel Apfelbaum wrote:
> On 09/05/2016 07:24 PM, Laszlo Ersek wrote:
>> On 09/01/16 15:22, Marcel Apfelbaum wrote:
>>> Proposes best practices on how to use PCIe/PCI device
>>> in PCIe based machines and explain the reasoning behind them.
>>>
>>> Signed-off-by: Marcel Apfelbaum
Hi,
> > +Plug only legacy PCI devices as Root Complex Integrated Devices
> > +even if the PCIe spec does not forbid PCIe devices.
>
> I suggest "even though the PCI Express spec does not forbid PCI Express
> devices as Integrated Devices". (Detail is good!)
While talking about integrated devic
On 09/05/2016 07:24 PM, Laszlo Ersek wrote:
On 09/01/16 15:22, Marcel Apfelbaum wrote:
Proposes best practices on how to use PCIe/PCI device
in PCIe based machines and explain the reasoning behind them.
Signed-off-by: Marcel Apfelbaum
---
Hi,
Please add your comments on what to add/remove/ed
On 09/01/16 15:22, Marcel Apfelbaum wrote:
> Proposes best practices on how to use PCIe/PCI device
> in PCIe based machines and explain the reasoning behind them.
>
> Signed-off-by: Marcel Apfelbaum
> ---
>
> Hi,
>
> Please add your comments on what to add/remove/edit to make this doc usable.
On 09/01/16 15:51, Marcel Apfelbaum wrote:
> On 09/01/2016 04:27 PM, Peter Maydell wrote:
>> On 1 September 2016 at 14:22, Marcel Apfelbaum wrote:
>>> Proposes best practices on how to use PCIe/PCI device
>>> in PCIe based machines and explain the reasoning behind them.
>>>
>>> Signed-off-by: Marc
On 09/01/2016 04:27 PM, Peter Maydell wrote:
On 1 September 2016 at 14:22, Marcel Apfelbaum wrote:
Proposes best practices on how to use PCIe/PCI device
in PCIe based machines and explain the reasoning behind them.
Signed-off-by: Marcel Apfelbaum
---
Hi,
Please add your comments on what to
On 1 September 2016 at 14:22, Marcel Apfelbaum wrote:
> Proposes best practices on how to use PCIe/PCI device
> in PCIe based machines and explain the reasoning behind them.
>
> Signed-off-by: Marcel Apfelbaum
> ---
>
> Hi,
>
> Please add your comments on what to add/remove/edit to make this doc
Proposes best practices on how to use PCIe/PCI device
in PCIe based machines and explain the reasoning behind them.
Signed-off-by: Marcel Apfelbaum
---
Hi,
Please add your comments on what to add/remove/edit to make this doc usable.
Thanks,
Marcel
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