Re: [Qemu-devel] [PATCH 6/6] e1000: Implementing various counters

2015-10-21 Thread Leonid Bloch
On Tue, Oct 20, 2015 at 9:34 AM, Jason Wang wrote: > > > On 10/18/2015 03:53 PM, Leonid Bloch wrote: >> This implements the following Statistic registers (various counters) >> according to Intel's specs: >> >> TSCTC GOTCL GOTCH GORCL GORCH MPRC BPRC RUCROC >> BPTC MPTC PTC... PRC.

Re: [Qemu-devel] [PATCH 6/6] e1000: Implementing various counters

2015-10-19 Thread Jason Wang
On 10/18/2015 03:53 PM, Leonid Bloch wrote: > This implements the following Statistic registers (various counters) > according to Intel's specs: > > TSCTC GOTCL GOTCH GORCL GORCH MPRC BPRC RUCROC > BPTC MPTC PTC... PRC... > > Signed-off-by: Leonid Bloch > Signed-off-by: Dmitry F

[Qemu-devel] [PATCH 6/6] e1000: Implementing various counters

2015-10-18 Thread Leonid Bloch
This implements the following Statistic registers (various counters) according to Intel's specs: TSCTC GOTCL GOTCH GORCL GORCH MPRC BPRC RUCROC BPTC MPTC PTC... PRC... Signed-off-by: Leonid Bloch Signed-off-by: Dmitry Fleytman --- hw/net/e1000.c | 83 ++