Re: [Qemu-devel] [PATCH 5/9] target-ppc: Introduce TEXASRU Bit Fields

2014-12-18 Thread Tom Musta
On 12/18/2014 12:29 PM, Alexander Graf wrote: > > > On 18.12.14 19:10, Tom Musta wrote: >> On 12/18/2014 11:02 AM, Alexander Graf wrote: >>> >>> >>> On 18.12.14 17:34, Tom Musta wrote: Define mnemonics for the various bit fields in the Transaction EXception And Summary Register (TEXASR)

Re: [Qemu-devel] [PATCH 5/9] target-ppc: Introduce TEXASRU Bit Fields

2014-12-18 Thread Alexander Graf
On 18.12.14 19:10, Tom Musta wrote: > On 12/18/2014 11:02 AM, Alexander Graf wrote: >> >> >> On 18.12.14 17:34, Tom Musta wrote: >>> Define mnemonics for the various bit fields in the Transaction >>> EXception And Summary Register (TEXASR). >> >> This is missing an SoB line. >> >> >> Alex >> > >

Re: [Qemu-devel] [PATCH 5/9] target-ppc: Introduce TEXASRU Bit Fields

2014-12-18 Thread Tom Musta
On 12/18/2014 11:02 AM, Alexander Graf wrote: > > > On 18.12.14 17:34, Tom Musta wrote: >> Define mnemonics for the various bit fields in the Transaction >> EXception And Summary Register (TEXASR). > > This is missing an SoB line. > > > Alex > Sorry about that. I will publish a V2 but may w

Re: [Qemu-devel] [PATCH 5/9] target-ppc: Introduce TEXASRU Bit Fields

2014-12-18 Thread Alexander Graf
On 18.12.14 17:34, Tom Musta wrote: > Define mnemonics for the various bit fields in the Transaction > EXception And Summary Register (TEXASR). This is missing an SoB line. Alex

[Qemu-devel] [PATCH 5/9] target-ppc: Introduce TEXASRU Bit Fields

2014-12-18 Thread Tom Musta
Define mnemonics for the various bit fields in the Transaction EXception And Summary Register (TEXASR). --- target-ppc/cpu.h | 20 1 files changed, 20 insertions(+), 0 deletions(-) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 38176c0..91a03f6 100644 --- a/target-p