Re: [Qemu-devel] [PATCH 5/6] Do constant folding for shift operations.

2011-05-27 Thread Richard Henderson
On 05/27/2011 10:07 AM, Blue Swirl wrote: >> The C99 hook exists to efficiently support targets that don't have >> arithmetic shift operations. Honestly. > > So it would be impossible for a compiler developer to change the logic > for shifts for some supported two's-complement logic CPUs (like x8

Re: [Qemu-devel] [PATCH 5/6] Do constant folding for shift operations.

2011-05-27 Thread Blue Swirl
On Fri, May 27, 2011 at 12:14 AM, Richard Henderson wrote: > On 05/26/2011 01:25 PM, Blue Swirl wrote: >>> I don't see the point.  The C99 implementation defined escape hatch >>> exists for weird cpus.  Which we won't be supporting as a QEMU host. >> >> Maybe not, but a compiler with this property

Re: [Qemu-devel] [PATCH 5/6] Do constant folding for shift operations.

2011-05-27 Thread Jamie Lokier
Richard Henderson wrote: > On 05/26/2011 01:25 PM, Blue Swirl wrote: > >> I don't see the point. The C99 implementation defined escape hatch > >> exists for weird cpus. Which we won't be supporting as a QEMU host. > > > > Maybe not, but a compiler with this property could arrive. For > > example

Re: [Qemu-devel] [PATCH 5/6] Do constant folding for shift operations.

2011-05-27 Thread Paolo Bonzini
On 05/26/2011 09:14 PM, Blue Swirl wrote: x = (int32_t)x>> (int32_t)y; >>> >> This expression has an implementation-defined behavior accroding to >> C99 6.5.7 so we decided to emulate signed shifts by hand. > > Technically, yes. In practice, no. GCC, ICC, LLVM, MSVC all know > what th

Re: [Qemu-devel] [PATCH 5/6] Do constant folding for shift operations.

2011-05-26 Thread Richard Henderson
On 05/26/2011 01:25 PM, Blue Swirl wrote: >> I don't see the point. The C99 implementation defined escape hatch >> exists for weird cpus. Which we won't be supporting as a QEMU host. > > Maybe not, but a compiler with this property could arrive. For > example, GCC developers could decide that si

Re: [Qemu-devel] [PATCH 5/6] Do constant folding for shift operations.

2011-05-26 Thread Blue Swirl
On Thu, May 26, 2011 at 11:10 PM, Richard Henderson wrote: > On 05/26/2011 12:14 PM, Blue Swirl wrote: >> On Thu, May 26, 2011 at 4:56 PM, Richard Henderson wrote: >>> On 05/26/2011 05:36 AM, Kirill Batuzov wrote: >   x = (int32_t)x >> (int32_t)y; > This expression has an implementat

Re: [Qemu-devel] [PATCH 5/6] Do constant folding for shift operations.

2011-05-26 Thread Richard Henderson
On 05/26/2011 12:14 PM, Blue Swirl wrote: > On Thu, May 26, 2011 at 4:56 PM, Richard Henderson wrote: >> On 05/26/2011 05:36 AM, Kirill Batuzov wrote: x = (int32_t)x >> (int32_t)y; >>> This expression has an implementation-defined behavior accroding to >>> C99 6.5.7 so we decided to em

Re: [Qemu-devel] [PATCH 5/6] Do constant folding for shift operations.

2011-05-26 Thread Blue Swirl
On Thu, May 26, 2011 at 4:56 PM, Richard Henderson wrote: > On 05/26/2011 05:36 AM, Kirill Batuzov wrote: >>>   x = (int32_t)x >> (int32_t)y; >>> >> This expression has an implementation-defined behavior accroding to >> C99 6.5.7 so we decided to emulate signed shifts by hand. > > Technically, yes

Re: [Qemu-devel] [PATCH 5/6] Do constant folding for shift operations.

2011-05-26 Thread Richard Henderson
On 05/26/2011 05:36 AM, Kirill Batuzov wrote: >> x = (int32_t)x >> (int32_t)y; >> > This expression has an implementation-defined behavior accroding to > C99 6.5.7 so we decided to emulate signed shifts by hand. Technically, yes. In practice, no. GCC, ICC, LLVM, MSVC all know what the user wan

Re: [Qemu-devel] [PATCH 5/6] Do constant folding for shift operations.

2011-05-26 Thread Kirill Batuzov
On Fri, 20 May 2011, Richard Henderson wrote: > > On 05/20/2011 05:39 AM, Kirill Batuzov wrote: > > +case INDEX_op_sar_i32: > > +#if TCG_TARGET_REG_BITS == 64 > > +x &= 0x; > > +y &= 0x; > > +#endif > > +r = x & 0x8000; > > +x &= ~0x80

Re: [Qemu-devel] [PATCH 5/6] Do constant folding for shift operations.

2011-05-20 Thread Richard Henderson
On 05/20/2011 05:39 AM, Kirill Batuzov wrote: > +case INDEX_op_sar_i32: > +#if TCG_TARGET_REG_BITS == 64 > +x &= 0x; > +y &= 0x; > +#endif > +r = x & 0x8000; > +x &= ~0x8000; > +x >>= y; > +r |= r - (r >> y); > +x |

[Qemu-devel] [PATCH 5/6] Do constant folding for shift operations.

2011-05-20 Thread Kirill Batuzov
Perform constant forlding for SHR, SHL, SAR, ROTR, ROTL operations. Signed-off-by: Kirill Batuzov --- tcg/optimize.c | 87 1 files changed, 87 insertions(+), 0 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index a02d5c1..b6b