On 10/11/2015 11:23 AM, Peter Crosthwaite wrote:
> On Fri, Oct 9, 2015 at 6:28 AM, Michael Davidsaver
> wrote:
>> The M series MPU is almost the same as the already
>> implemented R series MPU. So use the M series
>> and translate as best we can.
>>
> There is some work on list for this that neve
On Fri, Oct 9, 2015 at 6:28 AM, Michael Davidsaver
wrote:
> The M series MPU is almost the same as the already
> implemented R series MPU. So use the M series
> and translate as best we can.
>
There is some work on list for this that never got a respin:
https://lists.gnu.org/archive/html/qemu-d
The M series MPU is almost the same as the already
implemented R series MPU. So use the M series
and translate as best we can.
The HFNMIENA bit in MPU_CTRL is not implemented.
Implement CFSR and MMFAR to report fault address
to MemManage handler.
Add MPU feature flag to cortex-m3 and -m4.
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