Re: [Qemu-devel] [PATCH 20/28] target/riscv: Replace gen_load() with trans_load()

2018-10-13 Thread Richard Henderson
On 10/12/18 10:30 AM, Bastian Koppelmann wrote: > +static bool trans_load(DisasContext *ctx, arg_lb *a, int memop) Again, gen_load. > { > -gen_load(ctx, OPC_RISC_LB, a->rd, a->rs1, a->imm); > +TCGv t0 = tcg_temp_new(); > +TCGv t1 = tcg_temp_new(); > +gen_get_gpr(t0, a->rs1); > +

[Qemu-devel] [PATCH 20/28] target/riscv: Replace gen_load() with trans_load()

2018-10-12 Thread Bastian Koppelmann
With decodetree we don't need to convert RISC-V opcodes into to MemOps as gen_load() did. Signed-off-by: Bastian Koppelmann Signed-off-by: Peer Adelt --- target/riscv/insn_trans/trans_rvi.inc.c | 44 + target/riscv/translate.c| 20 --- 2 files cha