Beniamino Galvani wrote:
On Mon, Feb 24, 2014 at 02:45:06PM +0800, Li Guang wrote:
Beniamino Galvani wrote:
On Wed, Feb 19, 2014 at 10:02:36AM +0800, Li Guang wrote:
Beniamino Galvani wrote:
On Tue, Feb 18, 2014 at 11:49:51AM +0800, Li Guang wrote:
Ben
On Mon, Feb 24, 2014 at 02:45:06PM +0800, Li Guang wrote:
> Beniamino Galvani wrote:
> >On Wed, Feb 19, 2014 at 10:02:36AM +0800, Li Guang wrote:
> >>Beniamino Galvani wrote:
> >>>On Tue, Feb 18, 2014 at 11:49:51AM +0800, Li Guang wrote:
> Beniamino Galvani wrote:
> >According to this mail
Beniamino Galvani wrote:
On Wed, Feb 19, 2014 at 10:02:36AM +0800, Li Guang wrote:
Beniamino Galvani wrote:
On Tue, Feb 18, 2014 at 11:49:51AM +0800, Li Guang wrote:
Beniamino Galvani wrote:
According to this mail thread [1], writing to pending register seems
to ha
On Wed, Feb 19, 2014 at 10:02:36AM +0800, Li Guang wrote:
> Beniamino Galvani wrote:
> >On Tue, Feb 18, 2014 at 11:49:51AM +0800, Li Guang wrote:
> >>Beniamino Galvani wrote:
> >>>According to this mail thread [1], writing to pending register seems
> >>>to have no effect on actual pending status of
Beniamino Galvani wrote:
On Tue, Feb 18, 2014 at 11:49:51AM +0800, Li Guang wrote:
Beniamino Galvani wrote:
According to this mail thread [1], writing to pending register seems
to have no effect on actual pending status of interrupts. This means
that the only way to clear a pending in
On Tue, Feb 18, 2014 at 11:49:51AM +0800, Li Guang wrote:
> Beniamino Galvani wrote:
> >According to this mail thread [1], writing to pending register seems
> >to have no effect on actual pending status of interrupts. This means
> >that the only way to clear a pending interrupt is to clear the
> >i
pending registers are also clear registers by a10 datasheet,
also you found bits are marked as 'R', so, ..., contradict itself.
Beniamino Galvani wrote:
According to this mail thread [1], writing to pending register seems
to have no effect on actual pending status of interrupts. This means
that
According to this mail thread [1], writing to pending register seems
to have no effect on actual pending status of interrupts. This means
that the only way to clear a pending interrupt is to clear the
interrupt source. This patch implements such behaviour.
[1] http://lkml.org/lkml/2013/7/6/59
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