On 13 January 2015 at 00:13, Alexander Graf wrote:
> My main problem with multiple IRQs is that we'd have to describe the
> mapping.
This is true...
> I'd rather not have a fixed number of PCI slots hardcoded
> anywhere, especially not in the map.
...but this doesn't follow. What you do is the
On 12.01.2015 22:20, Peter Maydell wrote:
> On 12 January 2015 at 21:06, Alexander Graf wrote:
>>
>>
>> On 12.01.15 21:08, Peter Maydell wrote:
>>> On 12 January 2015 at 17:38, Alexander Graf wrote:
I'd prefer to keep things as easy as we humanly can for now. Then add
MSI. And if we the
On 12.01.15 22:20, Peter Maydell wrote:
> On 12 January 2015 at 21:06, Alexander Graf wrote:
>>
>>
>> On 12.01.15 21:08, Peter Maydell wrote:
>>> On 12 January 2015 at 17:38, Alexander Graf wrote:
I'd prefer to keep things as easy as we humanly can for now. Then add
MSI. And if we the
On 12 January 2015 at 21:06, Alexander Graf wrote:
>
>
> On 12.01.15 21:08, Peter Maydell wrote:
>> On 12 January 2015 at 17:38, Alexander Graf wrote:
>>> I'd prefer to keep things as easy as we humanly can for now. Then add
>>> MSI. And if we then realize that we still need 4 rather than 1 share
On 12.01.15 21:08, Peter Maydell wrote:
> On 12 January 2015 at 17:38, Alexander Graf wrote:
>> I'd prefer to keep things as easy as we humanly can for now. Then add
>> MSI. And if we then realize that we still need 4 rather than 1 shared
>> interrupt lines we can still change it :)
>
> Except
On 12 January 2015 at 17:38, Alexander Graf wrote:
> I'd prefer to keep things as easy as we humanly can for now. Then add
> MSI. And if we then realize that we still need 4 rather than 1 shared
> interrupt lines we can still change it :)
Except that that would be a breaking change, so I would pr
On 12.01.15 18:36, alvise rigo wrote:
> Hi Alexander,
>
> Just a comment below.
>
> On Tue, Jan 6, 2015 at 5:03 PM, Alexander Graf wrote:
>> With simple exposure of MMFG, ioport window, mmio window and an IRQ line we
>> can successfully create a workable PCIe host bridge that can be mapped
>>
Hi Alexander,
Just a comment below.
On Tue, Jan 6, 2015 at 5:03 PM, Alexander Graf wrote:
> With simple exposure of MMFG, ioport window, mmio window and an IRQ line we
> can successfully create a workable PCIe host bridge that can be mapped
> anywhere
> and only needs to get described to the OS
On 06.01.2015 17:03, Alexander Graf wrote:
> With simple exposure of MMFG, ioport window, mmio window and an IRQ line we
> can successfully create a workable PCIe host bridge that can be mapped
> anywhere
> and only needs to get described to the OS using whatever means it likes.
>
> This patch im
With simple exposure of MMFG, ioport window, mmio window and an IRQ line we
can successfully create a workable PCIe host bridge that can be mapped anywhere
and only needs to get described to the OS using whatever means it likes.
This patch implements such a "generic" host bridge. It only supports
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