On 2011-10-14 02:53, Lai Jiangshan wrote:
>
>>
>> As explained in some other mail, we could then emulate the missing
>> kernel feature by reading out the current in-kernel APIC state, testing
>> if LINT1 is unmasked, and then delivering the NMI directly.
>>
>
> Only the thread of the VCPU can saf
>
> As explained in some other mail, we could then emulate the missing
> kernel feature by reading out the current in-kernel APIC state, testing
> if LINT1 is unmasked, and then delivering the NMI directly.
>
Only the thread of the VCPU can safely get the in-kernel LAPIC states,
so this approac
On 2011-10-11 19:03, Lai Jiangshan wrote:
> From: Kenji Kaneshige
>
> Currently, NMI interrupt is blindly sent to all the vCPUs when NMI
> button event happens. This doesn't properly emulate real hardware on
> which NMI button event triggers LINT1. Because of this, NMI is sent to
> the processor
From: Kenji Kaneshige
Currently, NMI interrupt is blindly sent to all the vCPUs when NMI
button event happens. This doesn't properly emulate real hardware on
which NMI button event triggers LINT1. Because of this, NMI is sent to
the processor even when LINT1 is maskied in LVT. For example, this
c
