On Mo, 2015-05-11 at 15:49 +0200, Paolo Bonzini wrote:
> From: Gerd Hoffmann
[ more verbose commit message for squashing in ]
The cache bits in ESMRAMC are hardcoded to 1 (=disabled) according to
the q35 mch specs. Add and use a define with this default.
While being at it also update the SMRAM
From: Gerd Hoffmann
Signed-off-by: Gerd Hoffmann
Signed-off-by: Paolo Bonzini
---
hw/pci-host/q35.c | 1 +
include/hw/pci-host/q35.h | 7 ++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 35b89da..8471d7a 100644
--- a/hw/p
