On Tue, Jun 03, 2014 at 10:29:45AM +0100, Leon Alrae wrote:
> On 02/06/14 20:16, Aurelien Jarno wrote:
> >> -case OPC_DADDI:
> >> +case OPC_DADDI: /* OPC_BNVC, OPC_BNEZALC, OPC_BNEC */
> >> +if (ctx->insn_flags & ISA_MIPS32R6) {
> >> +/* OPC_BNVC, OPC_BNEZALC, OPC_BNEC *
On 02/06/14 20:16, Aurelien Jarno wrote:
>> -case OPC_DADDI:
>> +case OPC_DADDI: /* OPC_BNVC, OPC_BNEZALC, OPC_BNEC */
>> +if (ctx->insn_flags & ISA_MIPS32R6) {
>> +/* OPC_BNVC, OPC_BNEZALC, OPC_BNEC */
>> +gen_compute_compact_branch(ctx, op, rs, rt, imm << 2
On Fri, May 30, 2014 at 03:47:51PM +0100, Leon Alrae wrote:
> From: Yongbok Kim
>
> Introduce MIPS32R6 Compact Branch instructions which do not have delay slot -
> they have forbidden slot instead. However, current implementation does not
> support forbidden slot yet.
>
> Signed-off-by: Yongbok
On 05/30/2014 07:47 AM, Leon Alrae wrote:
> +switch (opc) {
> +case OPC_BLEZALC: /* OPC_BGEZALC, OPC_BGEUC */
> +if (rs == 0 && rt != 0) {
> +/* OPC_BLEZALC */
> +tcg_gen_setcondi_tl(TCG_COND_LE, bcond, t1, 0);
> +} else if (rs
From: Yongbok Kim
Introduce MIPS32R6 Compact Branch instructions which do not have delay slot -
they have forbidden slot instead. However, current implementation does not
support forbidden slot yet.
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
disas/mips.c| 67 ++
