On Fri, Aug 19, 2016 at 08:08:57PM +0100, Paul Burton wrote:
> Support moving the GCR base address & updating the CPU's CP0 CMGCRBase
> register appropriately. This is required if a platform needs to move its
> GCRs away from other memory, as the MIPS Boston development board does
> to avoid its fl
Support moving the GCR base address & updating the CPU's CP0 CMGCRBase
register appropriately. This is required if a platform needs to move its
GCRs away from other memory, as the MIPS Boston development board does
to avoid its flash memory.
Signed-off-by: Paul Burton
---
hw/misc/mips_cmgcr.c
