Re: [Qemu-devel] [PATCH 09/13] target/openrisc: Add support for ORFPX64A32

2019-08-26 Thread Stafford Horne
On Mon, Aug 26, 2019 at 05:07:41PM -0700, Richard Henderson wrote: > This is hardware support for double-precision floating-point > using pairs of 32-bit registers. Fix a latent bug in the > heretofore unused helper_itofd. Include the bit for cpu "any". > > Signed-off-by: Richard Henderson Rev

[Qemu-devel] [PATCH 09/13] target/openrisc: Add support for ORFPX64A32

2019-08-26 Thread Richard Henderson
This is hardware support for double-precision floating-point using pairs of 32-bit registers. Fix a latent bug in the heretofore unused helper_itofd. Include the bit for cpu "any". Signed-off-by: Richard Henderson --- linux-user/openrisc/target_elf.h | 2 +- target/openrisc/helper.h