From: David Gibson
This patch adds the basic infrastructure necessary to emulate an IOMMU
visible to the guest. The DMAContext structure is extended with
information and a callback describing the translation, and the various
DMA functions used by devices will now perform IOMMU translation using
On 05/15/2012 08:20 PM, Benjamin Herrenschmidt wrote:
On Tue, 2012-05-15 at 19:54 -0500, Anthony Liguori wrote:
You certainly could do that but it may get a little weird dealing with the
return path. You'd have to return something like -EWOULDBLOCK and make sure you
handle that in the dispatch
On Tue, 2012-05-15 at 19:54 -0500, Anthony Liguori wrote:
>
> You certainly could do that but it may get a little weird dealing with the
> return path. You'd have to return something like -EWOULDBLOCK and make sure
> you
> handle that in the dispatch code appropriately.
Hrm, our implementatio
On 05/15/2012 07:41 PM, Benjamin Herrenschmidt wrote:
On Tue, 2012-05-15 at 18:58 -0500, Anthony Liguori wrote:
Even ancient PIO devices really don't block indefinitely.
In our case (TCEs) it's a hypervisor call, not an MMIO op, so to some
extent it's even more likely to do "blocking" things.
On Tue, 2012-05-15 at 18:58 -0500, Anthony Liguori wrote:
> Even ancient PIO devices really don't block indefinitely.
>
> > In our case (TCEs) it's a hypervisor call, not an MMIO op, so to some
> > extent it's even more likely to do "blocking" things.
>
> Yes, so I think the right thing to do is
On 05/15/2012 06:08 PM, Benjamin Herrenschmidt wrote:
On Tue, 2012-05-15 at 17:02 -0500, Anthony Liguori wrote:
"6.2.1 Register Based Invalidation Interface
The register based invalidations provides a synchronous hardware interface for
invalidations. Software is expected to write to the IOTLB
On Tue, 2012-05-15 at 17:02 -0500, Anthony Liguori wrote:
>
> "6.2.1 Register Based Invalidation Interface
> The register based invalidations provides a synchronous hardware interface
> for
> invalidations. Software is expected to write to the IOTLB registers to
> submit
> invalidation comman
On 05/15/2012 04:55 PM, Benjamin Herrenschmidt wrote:
On Tue, 2012-05-15 at 09:02 -0500, Anthony Liguori wrote:
I think the crux of your argument is that upon a change to the translation
table, the operation acts as a barrier such that the exact moment it returns,
you're guaranteed that no DMAs
On Tue, 2012-05-15 at 09:02 -0500, Anthony Liguori wrote:
> I think the crux of your argument is that upon a change to the translation
> table, the operation acts as a barrier such that the exact moment it returns,
> you're guaranteed that no DMAs are in flight with the old translation mapping.
On 05/14/2012 10:02 PM, Benjamin Herrenschmidt wrote:
On Mon, 2012-05-14 at 21:50 -0500, Anthony Liguori wrote:
On 05/14/2012 09:32 PM, Benjamin Herrenschmidt wrote:
On Mon, 2012-05-14 at 21:03 -0500, Anthony Liguori wrote:
So the CPU thread runs in lock-step with the I/O thread. Dropping the
On Mon, 2012-05-14 at 21:50 -0500, Anthony Liguori wrote:
> On 05/14/2012 09:32 PM, Benjamin Herrenschmidt wrote:
> > On Mon, 2012-05-14 at 21:03 -0500, Anthony Liguori wrote:
> >> So the CPU thread runs in lock-step with the I/O thread. Dropping the CPU
> >> thread lock to let the I/O thread run
On 05/14/2012 09:32 PM, Benjamin Herrenschmidt wrote:
On Mon, 2012-05-14 at 21:03 -0500, Anthony Liguori wrote:
So the CPU thread runs in lock-step with the I/O thread. Dropping the CPU
thread lock to let the I/O thread run is a dangerous thing to do in a place like
this.
Also, I think you'd e
On Mon, 2012-05-14 at 21:03 -0500, Anthony Liguori wrote:
> So the CPU thread runs in lock-step with the I/O thread. Dropping the CPU
> thread lock to let the I/O thread run is a dangerous thing to do in a place
> like
> this.
>
> Also, I think you'd effectively block the CPU until pending DMA
On 05/14/2012 08:42 PM, David Gibson wrote:
On Mon, May 14, 2012 at 07:49:16PM -0500, Anthony Liguori wrote:
[snip]
+void iommu_wait_for_invalidated_maps(DMAContext *dma,
+ dma_addr_t addr, dma_addr_t len)
+{
+DMAMemoryMap *map;
+DMAInvalidationState i
On Mon, May 14, 2012 at 07:49:16PM -0500, Anthony Liguori wrote:
[snip]
> >+void iommu_wait_for_invalidated_maps(DMAContext *dma,
> >+ dma_addr_t addr, dma_addr_t len)
> >+{
> >+DMAMemoryMap *map;
> >+DMAInvalidationState is;
> >+
> >+is.count = 0;
>
On 05/09/2012 11:49 PM, Benjamin Herrenschmidt wrote:
From: David Gibson
This patch adds the basic infrastructure necessary to emulate an IOMMU
visible to the guest. The DMAContext structure is extended with
information and a callback describing the translation, and the various
DMA functions us
From: David Gibson
This patch adds the basic infrastructure necessary to emulate an IOMMU
visible to the guest. The DMAContext structure is extended with
information and a callback describing the translation, and the various
DMA functions used by devices will now perform IOMMU translation using
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