Re: [Qemu-devel] [PATCH 02/10] ppc/xive: Make the PIPR register readonly

2019-06-30 Thread David Gibson
On Sun, Jun 30, 2019 at 10:45:53PM +0200, Cédric Le Goater wrote: > When the hypervisor (KVM) dispatches a vCPU on a HW thread, it restores > its thread interrupt context. The Pending Interrupt Priority Register > (PIPR) is computed from the Interrupt Pending Buffer (IPB) and stores > should not be

[Qemu-devel] [PATCH 02/10] ppc/xive: Make the PIPR register readonly

2019-06-30 Thread Cédric Le Goater
When the hypervisor (KVM) dispatches a vCPU on a HW thread, it restores its thread interrupt context. The Pending Interrupt Priority Register (PIPR) is computed from the Interrupt Pending Buffer (IPB) and stores should not be allowed to change its value. Fixes: 207d9fe98510 ("ppc/xive: introduce t