Because Qemu currently requires a TCG target to exist and there are quite some
useful helpers here to lay the groundwork for out KVM target, let's create a
stub TCG emulation target for S390X CPUs.
This is required to make tcg happy. The emulation target itself won't work
though.
Signed-off-by: A
> > Our cpu keeps multiple seperate address spaces open at the same time
> > (similar to x86 with a bunch of cr0s), defined by address space control
> > elements in various control registers. Linux uses primary, secondary and
> > home space to address user space and kernel space. The third one is u
On 02.12.2009, at 09:17, Aurelien Jarno wrote:
> On Mon, Nov 30, 2009 at 11:30:04PM +0100, Alexander Graf wrote:
>>
>> On 30.11.2009, at 19:18, Aurelien Jarno wrote:
>>
>>> On Thu, Nov 26, 2009 at 02:23:10PM +0100, Alexander Graf wrote:
Because Qemu currently requires a TCG target to exist
On Mon, Nov 30, 2009 at 11:30:04PM +0100, Alexander Graf wrote:
>
> On 30.11.2009, at 19:18, Aurelien Jarno wrote:
>
> > On Thu, Nov 26, 2009 at 02:23:10PM +0100, Alexander Graf wrote:
> >> Because Qemu currently requires a TCG target to exist and there are quite
> >> some
> >> useful helpers he
Blue Swirl wrote:
The translation block (TB) refers to a block of host instructions,
translated from some block of target instructions under some
assumptions. The assumptions used when translating (for example, user
vs supervisor mode in the CPU state) are recorded to TB flags. If the
CPU state c
2009/12/1 Carsten Otte :
> Alexander Graf wrote:
>>>
>>> I don't know what psw.mask represent, but it may be wrong. It should be
>>> a way to identify which TB can be reused, that is they have been
>>> generated in the same CPU mode.
>>
>> psw.mask is rougly the same as RFLAGS, cr0 and cr4 on x86_6
On 01.12.2009, at 10:46, Carsten Otte wrote:
> Alexander Graf wrote:
>>> I don't know what psw.mask represent, but it may be wrong. It should be
>>> a way to identify which TB can be reused, that is they have been
>>> generated in the same CPU mode.
>> psw.mask is rougly the same as RFLAGS, cr0 a
Alexander Graf wrote:
I don't know what psw.mask represent, but it may be wrong. It should be
a way to identify which TB can be reused, that is they have been
generated in the same CPU mode.
psw.mask is rougly the same as RFLAGS, cr0 and cr4 on x86_64 combined. So IMHO
it looked like a pretty
On 30.11.2009, at 19:18, Aurelien Jarno wrote:
> On Thu, Nov 26, 2009 at 02:23:10PM +0100, Alexander Graf wrote:
>> Because Qemu currently requires a TCG target to exist and there are quite
>> some
>> useful helpers here to lay the groundwork for out KVM target, let's create a
>> stub TCG emulat
On Thu, Nov 26, 2009 at 02:23:10PM +0100, Alexander Graf wrote:
> Because Qemu currently requires a TCG target to exist and there are quite some
> useful helpers here to lay the groundwork for out KVM target, let's create a
> stub TCG emulation target for S390X CPUs.
>
> This is required to make t
Because Qemu currently requires a TCG target to exist and there are quite some
useful helpers here to lay the groundwork for out KVM target, let's create a
stub TCG emulation target for S390X CPUs.
This is required to make tcg happy. The emulation target itself won't work
though.
Signed-off-by: A
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