On 01/10/2014 10:37 AM, Peter Maydell wrote:
> On 10 January 2014 18:28, Richard Henderson wrote:
>> On 01/10/2014 10:18 AM, Peter Maydell wrote:
> Maybe better to hoist load of
> tcg_rn to before initial assignment of tcg_addr?
>>> Not sure what you have in mind here. Pulling the
>>> cpu_
On 10 January 2014 18:28, Richard Henderson wrote:
> On 01/10/2014 10:18 AM, Peter Maydell wrote:
>>> > Maybe better to hoist load of
>>> > tcg_rn to before initial assignment of tcg_addr?
>> Not sure what you have in mind here. Pulling the
>> cpu_reg_sp() call out one level like:
>>
>> if (is
On 01/10/2014 10:18 AM, Peter Maydell wrote:
>> > Maybe better to hoist load of
>> > tcg_rn to before initial assignment of tcg_addr?
> Not sure what you have in mind here. Pulling the
> cpu_reg_sp() call out one level like:
>
> if (is_postidx) {
> int rm = extract32(insn, 16, 5);
>
On 10 January 2014 18:05, Richard Henderson wrote:
> On 01/10/2014 09:12 AM, Peter Maydell wrote:
>> +TCGMemOp memop = MO_TE + size;
>
> Double space after =. Multiple occurrences.
Just this one plus its copy-n-paste in do_vec_st, I think.
>> +if (is_postidx) {
>> +int rm = ext
On 01/10/2014 09:12 AM, Peter Maydell wrote:
> +TCGMemOp memop = MO_TE + size;
Double space after =. Multiple occurrences.
> +if (is_postidx) {
> +int rm = extract32(insn, 16, 5);
> +if (rm == 31) {
> +tcg_gen_mov_i64(cpu_reg_sp(s, rn), tcg_addr);
> +
From: Alex Bennée
This adds support support for the SIMD load/store
multiple category of instructions.
This also brings in a couple of helper functions for manipulating
sections of the SIMD registers:
* do_vec_get - fetch value from a slice of a vector register
* do_vec_set - set a slice of
