Ping.
r~
On 08/17/2013 04:26 PM, Richard Henderson wrote:
> We have -- or will have -- several targets which have a native
> multiply-highpart instruction: ppc*, ia64, aarch64, alpha.
>
> If we leave only the mul[us]2 opcode with which to expose this,
> we have to handle the register allocation
We have -- or will have -- several targets which have a native
multiply-highpart instruction: ppc*, ia64, aarch64, alpha.
If we leave only the mul[us]2 opcode with which to expose this,
we have to handle the register allocation bits in the backends.
Better, IMO, to expose the two parts at the TCG
