On 11/11/2016 01:16 AM, David Gibson wrote:
> On Thu, Nov 10, 2016 at 01:17:10PM +0100, Cédric Le Goater wrote:
>> Add a couple of tests on the XSCOM bus of the PowerNV machine for the
>> the POWER8 and POWER9 CPUs. The first tests reads the CFAM identifier
>> of the chip. The second test goes furt
On Thu, Nov 10, 2016 at 01:17:10PM +0100, Cédric Le Goater wrote:
> Add a couple of tests on the XSCOM bus of the PowerNV machine for the
> the POWER8 and POWER9 CPUs. The first tests reads the CFAM identifier
> of the chip. The second test goes further in the XSCOM address space
> and reaches the
Add a couple of tests on the XSCOM bus of the PowerNV machine for the
the POWER8 and POWER9 CPUs. The first tests reads the CFAM identifier
of the chip. The second test goes further in the XSCOM address space
and reaches the cores to read their DTS registers. This last one is
disabled on P9 for the
