On 05/25/2015 02:55 PM, Alexander Graf wrote:
> For linux-user we could just implement probe as
>
> foo = load_x_bytes(addr)
> store_x_bytes(addr, foo)
>
> or can we have write-only maps there?
One of these days I'm going to enable softmmu for linux-user, at least as an
option. While direct
On 25 May 2015 at 22:55, Alexander Graf wrote:
> For linux-user we could just implement probe as
>
> foo = load_x_bytes(addr)
> store_x_bytes(addr, foo)
>
> or can we have write-only maps there?
The guest can mmap() things write-only, so yes.
-- PMM
On 25.05.15 23:05, Aurelien Jarno wrote:
> On 2015-05-23 12:33, Richard Henderson wrote:
>> On 05/23/2015 12:59 AM, Aurelien Jarno wrote:
>>> On 2015-05-21 14:42, Richard Henderson wrote:
Hmm. Seems to be un/under-specified in the PoO. That said,
>>>
>>> There is a small sentence in the Po
On 2015-05-23 12:33, Richard Henderson wrote:
> On 05/23/2015 12:59 AM, Aurelien Jarno wrote:
> >On 2015-05-21 14:42, Richard Henderson wrote:
> >>Hmm. Seems to be un/under-specified in the PoO. That said,
> >
> >There is a small sentence in the PoO, in chapter "Program Execution",
> >section "Se
On 2015-05-25 22:47, Alexander Graf wrote:
>
>
> On 23.05.15 21:33, Richard Henderson wrote:
> > On 05/23/2015 12:59 AM, Aurelien Jarno wrote:
> >> On 2015-05-21 14:42, Richard Henderson wrote:
> >>> Hmm. Seems to be un/under-specified in the PoO. That said,
> >>
> >> There is a small sentence
On 23.05.15 21:33, Richard Henderson wrote:
> On 05/23/2015 12:59 AM, Aurelien Jarno wrote:
>> On 2015-05-21 14:42, Richard Henderson wrote:
>>> Hmm. Seems to be un/under-specified in the PoO. That said,
>>
>> There is a small sentence in the PoO, in chapter "Program Execution",
>> section "Seq
On 05/23/2015 12:59 AM, Aurelien Jarno wrote:
On 2015-05-21 14:42, Richard Henderson wrote:
Hmm. Seems to be un/under-specified in the PoO. That said,
There is a small sentence in the PoO, in chapter "Program Execution",
section "Sequence of Storage Reference":
It can normally be assumed
On 23 May 2015 at 09:22, Aurelien Jarno wrote:
> On 2015-05-22 00:00, Alexander Graf wrote:
>> Looks like you're finding lots of fun corner case bugs in the
>> emulation. Have you or Richard considered to implement s390x
>> support in Risu yet? Aarch64 emulation accuracy is remarkable
>> since its
On 2015-05-22 00:00, Alexander Graf wrote:
> Looks like you're finding lots of fun corner case bugs in the emulation. Have
> you or Richard considered to implement s390x support in Risu yet? Aarch64
> emulation accuracy is remarkable since its introduction.
I have just learned about Risu, so no
On 2015-05-21 14:42, Richard Henderson wrote:
> On 05/21/2015 02:32 PM, Aurelien Jarno wrote:
> > When consecutive memory locations are on page boundary a page fault
> > might occur when using the LOAD MULTIPLE instruction. In that case real
> > hardware doesn't load any register.
> >
> > This is
> Am 21.05.2015 um 23:32 schrieb Aurelien Jarno :
>
> When consecutive memory locations are on page boundary a page fault
> might occur when using the LOAD MULTIPLE instruction. In that case real
> hardware doesn't load any register.
>
> This is an important detail in case the base register is
On 05/21/2015 02:32 PM, Aurelien Jarno wrote:
> When consecutive memory locations are on page boundary a page fault
> might occur when using the LOAD MULTIPLE instruction. In that case real
> hardware doesn't load any register.
>
> This is an important detail in case the base register is in the li
When consecutive memory locations are on page boundary a page fault
might occur when using the LOAD MULTIPLE instruction. In that case real
hardware doesn't load any register.
This is an important detail in case the base register is in the list
of registers to be loaded. If a page fault occurs thi
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