David Gibson wrote on 06/04/2017 07:55:34
PM:
> From: David Gibson
> To: Aaron Larson
> Cc: ag...@suse.de, qemu-devel@nongnu.org, qemu-...@nongnu.org
> Date: 06/04/2017 07:55 PM
> Subject: Re: [PATCH] target-ppc: Fix openpic timer read register offset
>
> On Fri, Jun 02, 2017 at 04:32:59AM -0
On Fri, Jun 02, 2017 at 04:32:59AM -0700, Aaron Larson wrote:
>
> openpic_tmr_read() is incorrectly computing register offset of the
> TCCR, TBCR, TVPR, and TDR registers when accessing the open pic timer
> registers. Specifically the offset of timer registers for
> openpic_tmr_read() is not acco
openpic_tmr_read() is incorrectly computing register offset of the
TCCR, TBCR, TVPR, and TDR registers when accessing the open pic timer
registers. Specifically the offset of timer registers for
openpic_tmr_read() is not accounting for the timer frequency reporting
register (TFFR) which is the fi
