When the initial SP is loaded from the vector table on ARMv7M systems the two
least significant bits are ignored as the stack is always aligned at a four byte
boundary (see ARM DDI 0403C, B1.4.1 and B1.5.5). So far QEMU did not ignore
these bits leading to a stack alignment inconsitent with real ha
On 4 September 2013 10:23, Sebastian Ottlik wrote:
> When the initial SP is loaded from the vector table on ARMv7M systems the two
> least significant bits are ignored as the stack is always aligned at a four
> byte
> boundary (see ARM DDI 0403C, B1.4.1 and B1.5.5). So far QEMU did not ignore
> t
