Re: [Qemu-devel] [PATCH] rtl8139: correctly handle PHY reset

2016-12-13 Thread Jason Wang
On 2016年12月14日 03:44, Hervé Poussineau wrote: According to datasheet: "[Bit 15 of Basic Mode Control Register] sets the status and control registers of the PHY (register 0062-0074) in a default state. This bit is self-clearing. 1 = software reset; 0 = normal operation." This fixes the netcard

[Qemu-devel] [PATCH] rtl8139: correctly handle PHY reset

2016-12-13 Thread Hervé Poussineau
According to datasheet: "[Bit 15 of Basic Mode Control Register] sets the status and control registers of the PHY (register 0062-0074) in a default state. This bit is self-clearing. 1 = software reset; 0 = normal operation." This fixes the netcard detection failure in Minoca OS. Signed-off-by: He