On 30 April 2013 19:09, Kwok Cheung Yeung wrote:
> Signal handlers written using a compressed MIPS instruction
> set will segfault when invoked. This patch fixes this.
>
> Switch the ISA mode on cores supporting the MIPS16/microMIPS
> ISAs according to bit 0 of the signal handler address. Clear
Signal handlers written using a compressed MIPS instruction
set will segfault when invoked. This patch fixes this.
Switch the ISA mode on cores supporting the MIPS16/microMIPS
ISAs according to bit 0 of the signal handler address. Clear
bit 0 of the address assigned to the PC.
Signed-off-by: Kw
Signal handlers written using a compressed MIPS instruction
set will segfault when invoked. This patch fixes this.
Switch the ISA mode on cores supporting the MIPS16/microMIPS
ISAs according to bit 0 of the signal handler address. Clear
bit 0 of the address assigned to the PC.
Signed-off-by: Kw
