On 07/10/2011 14:40, Alexander Graf wrote:
> On 09/28/2011 05:54 PM, Fabien Chouteau wrote:
>> SPE instructions are defined by pairs. Currently, the invalid-bits mask is
>> set
>> for the first instruction, but the second one can have a different mask.
>>
>> example:
>> GEN_SPE(efdcmpeq,efdcfs
On 09/28/2011 05:54 PM, Fabien Chouteau wrote:
SPE instructions are defined by pairs. Currently, the invalid-bits mask is set
for the first instruction, but the second one can have a different mask.
example:
GEN_SPE(efdcmpeq,efdcfs, 0x17, 0x0B, 0x0060, 0x0018,
PPC_SPE_DOUBLE),
On 28/09/2011 17:54, Fabien Chouteau wrote:
> SPE instructions are defined by pairs. Currently, the invalid-bits mask is set
> for the first instruction, but the second one can have a different mask.
>
> example:
> GEN_SPE(efdcmpeq,efdcfs, 0x17, 0x0B, 0x0060, 0x0018,
> PPC_SPE_DO
SPE instructions are defined by pairs. Currently, the invalid-bits mask is set
for the first instruction, but the second one can have a different mask.
example:
GEN_SPE(efdcmpeq,efdcfs, 0x17, 0x0B, 0x0060, 0x0018,
PPC_SPE_DOUBLE),
Signed-off-by: Fabien Chouteau
---
target-ppc/
