ping?
On 16/08/17 11:25, Marcel Apfelbaum wrote:
On 15/08/2017 17:44, Matt Redfearn wrote:
PCIe busses are always little endian, so set the endianness of the
memory region to little endian rather than native such that operations
work as expected on big endian targets.
Signed-off-by: Matt Redf
On 15/08/2017 17:44, Matt Redfearn wrote:
PCIe busses are always little endian, so set the endianness of the
memory region to little endian rather than native such that operations
work as expected on big endian targets.
Signed-off-by: Matt Redfearn
Hi Matt,
Thanks for the patch.
---
hw/
PCIe busses are always little endian, so set the endianness of the
memory region to little endian rather than native such that operations
work as expected on big endian targets.
Signed-off-by: Matt Redfearn
---
hw/pci/pcie_host.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
