Re: [Qemu-devel] [PATCH] Adding BAR0 for e500 PCI controller

2012-09-19 Thread Bhushan Bharat-R65777
> -Original Message- > From: Alexander Graf [mailto:ag...@suse.de] > Sent: Wednesday, September 19, 2012 4:33 PM > To: Bhushan Bharat-R65777 > Cc: qemu-devel@nongnu.org; qemu-...@nongnu.org; afaer...@suse.de; Bhushan > Bharat-R65777 > Subject: Re: [PATCH] Adding BAR0 for e500 PCI controll

Re: [Qemu-devel] [PATCH] Adding BAR0 for e500 PCI controller

2012-09-19 Thread Alexander Graf
On 19.09.2012, at 09:41, Bharat Bhushan wrote: > PCI Root complex have TYPE-1 configuration header while PCI endpoint > have type-0 configuration header. The type-1 configuration header have > a BAR (BAR0). In Freescale PCI controller BAR0 is used for mapping pci > address space to CCSR address s

[Qemu-devel] [PATCH] Adding BAR0 for e500 PCI controller

2012-09-19 Thread Bharat Bhushan
PCI Root complex have TYPE-1 configuration header while PCI endpoint have type-0 configuration header. The type-1 configuration header have a BAR (BAR0). In Freescale PCI controller BAR0 is used for mapping pci address space to CCSR address space. This can used for 2 purposes: 1) for MSI interrupt