Fabrice Bellard wrote:
> I just added an ELF loader (inspirated from the SPARC one) which should
> work for all architectures. It supports symbol loading and use the CPU
> physical memory mappings to compute correct RAM addresses.
I extended it so that it provides the ELF entry point address, fi
I just added an ELF loader (inspirated from the SPARC one) which should
work for all architectures. It supports symbol loading and use the CPU
physical memory mappings to compute correct RAM addresses.
Fabrice.
Dirk Behme wrote:
Hi,
ELF loader feature for MIPS in patch
http://lists.gnu.org/
move k0, zero
j0xbfc00400
nop
Is the move implemented as addiu or as daddiu? The latter would RI.
Oh! It was daddu (gcc -mips3) opcode.
Another issue:
mtc0 zero, C0_CAUSE
===
IN:
0xbfc00424: mtc0 zero,$13
OP:
0x: save_pc 0xbfc00424
0x0001: raise_exception
"Thiemo Seufer" <[EMAIL PROTECTED]> wrote:
>You could find my qemu.log there:
>http://www.nwpi.ru/~alec/mips/qemu_log.txt
>It goes into infinity exception loop.
I'm not quite sure why but you're getting a RI exception on the
address 0xbfc8 wich is the "move k0, zero" in the delay slot. I
Marius Groeger wrote:
> Hi Alex,
>
> >I've written to the qemu-devel list, no answers.
>
> I copied the list.
>
> >You could find my qemu.log there:
> >http://www.nwpi.ru/~alec/mips/qemu_log.txt
> >It goes into infinity exception loop. The command string was
>
> I'm not quite sure why but you'r
Hi Alex,
I've written to the qemu-devel list, no answers.
I copied the list.
You could find my qemu.log there:
http://www.nwpi.ru/~alec/mips/qemu_log.txt
It goes into infinity exception loop. The command string was
I'm not quite sure why but you're getting a RI exception on the
address 0x
"Dirk Behme" <[EMAIL PROTECTED]> wrote:
See a http://pastebin.com/628591
Sorry, does this link really work? I get a nearly empty page for this.
Ah, pastebin keeps data only a day.
I'm working on something similiar, if you want to call an
embedded bootloader like uboot a BIOS ;) Anyway, I n
Alexander Voropay wrote:
I'm trying to implement a mips_bios, unfortunately, quemu seems can't
run a code at the 0xbfc0 region.
See a http://pastebin.com/628591
The conventional 'move k0,zero' instruction (line 35) causes an general
exceprion to 0xbfc00380, see line 70
Try to change the f
"Thiemo Seufer" <[EMAIL PROTECTED]> wrote:
cpu_mips_handle_mmu_fault pc 8001 ad 8001 rw 2
is_user 0 smmu 1
That comes not from the MIPS TLB mapping (which is for KSEG0/1 a fixed
translation involving the high bits) but the underlying qemu softmmu
support.
I'm trying to implement a mi
On Thu, Mar 30, 2006 at 03:40:25PM +0200, Dirk Behme wrote:
> Thiemo Seufer wrote:
> >On Tue, Mar 28, 2006 at 08:57:15AM +0200, Dirk Behme wrote:
> >>What about the patch in attachment? It first tries to load
> >>image as an ELF file. If this fails it falls back to raw
> >>image load. Additionally,
Thiemo Seufer wrote:
On Tue, Mar 28, 2006 at 08:57:15AM +0200, Dirk Behme wrote:
What about the patch in attachment? It first tries to load
image as an ELF file. If this fails it falls back to raw
image load. Additionally, it takes feature of patch above to
go on even if no BIOS is found.
A s
On Tue, Mar 28, 2006 at 08:57:15AM +0200, Dirk Behme wrote:
> Hi,
>
> ELF loader feature for MIPS in patch
>
> http://lists.gnu.org/archive/html/qemu-devel/2006-03/msg00033.html
>
> was rejected because it breaks loading of raw kernel images:
>
> http://lists.gnu.org/archive/html/qemu-devel/200
Hi,
ELF loader feature for MIPS in patch
http://lists.gnu.org/archive/html/qemu-devel/2006-03/msg00033.html
was rejected because it breaks loading of raw kernel images:
http://lists.gnu.org/archive/html/qemu-devel/2006-03/msg00082.html
What about the patch in attachment? It first tries to loa
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