From: Prem Mallappa
ARM SMMU requires PCI read/write memory requestors' Identification. This
will propogate the "Device" information all the way till IOMMU device.
ARM SMMU uses the device's ARID to index into tables on a per device basis.
The ARM SMMU v3 device emulation will follow this patch s
From: Prem Mallappa
ARM SMMU requires PCI read/write memory requestors' Identification. This
will propogate the "Device" information all the way till IOMMU device.
ARM SMMU uses the device's ARID to index into tables on a per device basis.
The ARM SMMU v3 device emulation will follow this patch s
