On Sun, May 13, 2007 at 04:57:42PM +0200, Aurelien Jarno wrote:
> Thiemo Seufer a écrit :
> > Aurelien Jarno wrote:
> >> Hi all,
> >>
> >> The patch below fixes the mfc0 and dmtc0 instructions for the
> >> MIPS64 target:
> >>
> >> - The mfc0 instruction should return the 32 lowest bits of the
> >
Thiemo Seufer a écrit :
> Aurelien Jarno wrote:
>> Hi all,
>>
>> The patch below fixes the mfc0 and dmtc0 instructions for the
>> MIPS64 target:
>>
>> - The mfc0 instruction should return the 32 lowest bits of the
>> coprocessor 0 register sign extended to 64-bit.
>
> Agreed, and I think it do
Aurelien Jarno wrote:
>
> Hi all,
>
> The patch below fixes the mfc0 and dmtc0 instructions for the
> MIPS64 target:
>
> - The mfc0 instruction should return the 32 lowest bits of the
> coprocessor 0 register sign extended to 64-bit.
Agreed, and I think it doess already. (The places where y
Hi all,
The patch below fixes the mfc0 and dmtc0 instructions for the
MIPS64 target:
- The mfc0 instruction should return the 32 lowest bits of the
coprocessor 0 register sign extended to 64-bit.
- The mtc0 instruction should do the same as the dmtc0 instruction for
64-bit coprocessor reg
