Re: [PULL v2 07/35] target/riscv: access cfg structure through DisasContext

2022-02-16 Thread Alistair Francis
On Wed, Feb 16, 2022 at 8:24 PM Philipp Tomsich wrote: > > Alistair, > > This PULL seems not to include the fixup (which you had intended to > squash into it) for the regression introduced (i.e. the condition > being inverted): > > https://patchwork.kernel.org/project/qemu-devel/patch/202202031

Re: [PULL v2 07/35] target/riscv: access cfg structure through DisasContext

2022-02-16 Thread Philipp Tomsich
Alistair, This PULL seems not to include the fixup (which you had intended to squash into it) for the regression introduced (i.e. the condition being inverted): https://patchwork.kernel.org/project/qemu-devel/patch/20220203153946.2676353-1-philipp.toms...@vrull.eu/ Without that change this will

[PULL v2 07/35] target/riscv: access cfg structure through DisasContext

2022-02-15 Thread Alistair Francis
From: Philipp Tomsich The Zb[abcs] support code still uses the RISCV_CPU macros to access the configuration information (i.e., check whether an extension is available/enabled). Now that we provide this information directly from DisasContext, we can access this directly via the cfg_ptr field. Si