Re: [PULL 47/50] target/riscv: Add Smdbltrp ISA extension enable switch

Hey Alistair, While doing a non regression with default bios (OpenSBI 1.5) and max cpu, Atish found that this breaks boot with OpenSBI 1.5 since it does not have support for double trap clearing. On Henrique guidance, I resent this patch alone with an associated fix. : https://lore.kernel.org/qe

[PULL 47/50] target/riscv: Add Smdbltrp ISA extension enable switch

From: Clément Léger Add the switch to enable the Smdbltrp ISA extension. Signed-off-by: Clément Léger Reviewed-by: Alistair Francis Message-ID: <20250110125441.3208676-10-cle...@rivosinc.com> Signed-off-by: Alistair Francis --- target/riscv/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff