On 2023/10/13 4:10, Daniel Henrique Barboza wrote:
On 10/11/23 04:02, Akihiko Odaki wrote:
MISA limits are common for all instances of a RISC-V CPU class so they
are better put into class.
Signed-off-by: Akihiko Odaki
---
This patch and patches 2 and 3 from this version (v9) got dropped fr
On 10/11/23 04:02, Akihiko Odaki wrote:
MISA limits are common for all instances of a RISC-V CPU class so they
are better put into class.
Signed-off-by: Akihiko Odaki
---
This patch and patches 2 and 3 from this version (v9) got dropped from the later
versions of the series. Can I assume t
On 2023/10/12 0:23, Alex Bennée wrote:
Akihiko Odaki writes:
MISA limits are common for all instances of a RISC-V CPU class so they
are better put into class.
Signed-off-by: Akihiko Odaki
---
target/riscv/cpu-qom.h | 2 +
target/riscv/cpu.h | 2 -
hw/riscv/boot.c |
Akihiko Odaki writes:
> MISA limits are common for all instances of a RISC-V CPU class so they
> are better put into class.
>
> Signed-off-by: Akihiko Odaki
> ---
> +static void riscv_host_cpu_init(Object *obj)
> +{
> +CPURISCVState *env = &RISCV_CPU(obj)->env;
> riscv_cpu_add_user_p
Akihiko Odaki writes:
> MISA limits are common for all instances of a RISC-V CPU class so they
> are better put into class.
>
> Signed-off-by: Akihiko Odaki
> ---
> target/riscv/cpu-qom.h | 2 +
> target/riscv/cpu.h | 2 -
> hw/riscv/boot.c | 2 +-
> target/riscv/cpu.c
MISA limits are common for all instances of a RISC-V CPU class so they
are better put into class.
Signed-off-by: Akihiko Odaki
---
target/riscv/cpu-qom.h | 2 +
target/riscv/cpu.h | 2 -
hw/riscv/boot.c | 2 +-
target/riscv/cpu.c | 212 +++
