Re: [PATCH v9] target/riscv: Add Smdbltrp ISA extension enable switch

2025-01-17 Thread Alistair Francis
On Thu, Jan 16, 2025 at 11:17 PM Clément Léger wrote: > > Add the switch to enable the Smdbltrp ISA extension and disable it for > the max cpu. Indeed, OpenSBI when Smdbltrp is present, M-mode double > trap is enabled by default and MSTATUS.MDT needs to be cleared to avoid > taking a double trap.

Re: [PATCH v9] target/riscv: Add Smdbltrp ISA extension enable switch

2025-01-16 Thread Daniel Henrique Barboza
On 1/16/25 10:15 AM, Clément Léger wrote: Add the switch to enable the Smdbltrp ISA extension and disable it for the max cpu. Indeed, OpenSBI when Smdbltrp is present, M-mode double trap is enabled by default and MSTATUS.MDT needs to be cleared to avoid taking a double trap. OpenSBI does not c

[PATCH v9] target/riscv: Add Smdbltrp ISA extension enable switch

2025-01-16 Thread Clément Léger
Add the switch to enable the Smdbltrp ISA extension and disable it for the max cpu. Indeed, OpenSBI when Smdbltrp is present, M-mode double trap is enabled by default and MSTATUS.MDT needs to be cleared to avoid taking a double trap. OpenSBI does not currently support it so disable it for the max c