Re: [PATCH v6 3/5] riscv: Allow user to set the satp mode

2023-01-24 Thread Alexandre Ghiti
On Mon, Jan 23, 2023 at 11:29 AM Andrew Jones wrote: > > On Mon, Jan 23, 2023 at 10:03:22AM +0100, Alexandre Ghiti wrote: > ... > > +/* Sets the satp mode to the max supported */ > > +static void set_satp_mode_default(RISCVCPU *cpu, bool is_32_bit) > > +{ > > nit: When passing in the cpu object po

Re: [PATCH v6 3/5] riscv: Allow user to set the satp mode

2023-01-24 Thread Alexandre Ghiti
On Mon, Jan 23, 2023 at 11:14 AM Andrew Jones wrote: > > On Mon, Jan 23, 2023 at 10:03:22AM +0100, Alexandre Ghiti wrote: > > RISC-V specifies multiple sizes for addressable memory and Linux probes for > > the machine's support at startup via the satp CSR register (done in > > csr.c:validate_vm).

Re: [PATCH v6 3/5] riscv: Allow user to set the satp mode

2023-01-24 Thread Alexandre Ghiti
Hi Andrew, On Mon, Jan 23, 2023 at 11:11 AM Andrew Jones wrote: > > On Mon, Jan 23, 2023 at 10:03:22AM +0100, Alexandre Ghiti wrote: > > RISC-V specifies multiple sizes for addressable memory and Linux probes for > > the machine's support at startup via the satp CSR register (done in > > csr.c:va

Re: [PATCH v6 3/5] riscv: Allow user to set the satp mode

2023-01-23 Thread Andrew Jones
On Mon, Jan 23, 2023 at 10:03:22AM +0100, Alexandre Ghiti wrote: ... > +/* Sets the satp mode to the max supported */ > +static void set_satp_mode_default(RISCVCPU *cpu, bool is_32_bit) > +{ nit: When passing in the cpu object pointer there's no need to also pass is_32_bit, we can just use it from

Re: [PATCH v6 3/5] riscv: Allow user to set the satp mode

2023-01-23 Thread Andrew Jones
On Mon, Jan 23, 2023 at 10:03:22AM +0100, Alexandre Ghiti wrote: > RISC-V specifies multiple sizes for addressable memory and Linux probes for > the machine's support at startup via the satp CSR register (done in > csr.c:validate_vm). > > As per the specification, sv64 must support sv57, which in

Re: [PATCH v6 3/5] riscv: Allow user to set the satp mode

2023-01-23 Thread Andrew Jones
On Mon, Jan 23, 2023 at 10:03:22AM +0100, Alexandre Ghiti wrote: > RISC-V specifies multiple sizes for addressable memory and Linux probes for > the machine's support at startup via the satp CSR register (done in > csr.c:validate_vm). > > As per the specification, sv64 must support sv57, which in

[PATCH v6 3/5] riscv: Allow user to set the satp mode

2023-01-23 Thread Alexandre Ghiti
RISC-V specifies multiple sizes for addressable memory and Linux probes for the machine's support at startup via the satp CSR register (done in csr.c:validate_vm). As per the specification, sv64 must support sv57, which in turn must support sv48...etc. So we can restrict machine support by simply