Re: [PATCH v6 2/9] target/riscv: Add Ssdbltrp CSRs handling

2024-12-16 Thread Alistair Francis
On Fri, Nov 29, 2024 at 12:14 AM Clément Léger wrote: > > Add ext_ssdbltrp in RISCVCPUConfig and implement MSTATUS.SDT, > {H|M}ENVCFG.DTE and modify the availability of MTVAL2 based on the > presence of the Ssdbltrp ISA extension. > > Signed-off-by: Clément Léger Reviewed-by: Alistair Francis

Re: [PATCH v6 2/9] target/riscv: Add Ssdbltrp CSRs handling

2024-12-09 Thread Daniel Henrique Barboza
On 11/28/24 11:12 AM, Clément Léger wrote: Add ext_ssdbltrp in RISCVCPUConfig and implement MSTATUS.SDT, {H|M}ENVCFG.DTE and modify the availability of MTVAL2 based on the presence of the Ssdbltrp ISA extension. Signed-off-by: Clément Léger --- Reviewed-by: Daniel Henrique Barboza ta

[PATCH v6 2/9] target/riscv: Add Ssdbltrp CSRs handling

2024-11-28 Thread Clément Léger
Add ext_ssdbltrp in RISCVCPUConfig and implement MSTATUS.SDT, {H|M}ENVCFG.DTE and modify the availability of MTVAL2 based on the presence of the Ssdbltrp ISA extension. Signed-off-by: Clément Léger --- target/riscv/cpu.h| 1 + target/riscv/cpu_bits.h | 6 target/riscv/cpu_cfg.h