Re: [PATCH v6 10/23] target/riscv: Implement AIA CSRs for 64 local interrupts on RV32

Anup Patel 於 2021年12月30日 週四 下午8:55寫道： > From: Anup Patel > > The AIA specification adds new CSRs for RV32 so that RISC-V hart can > support 64 local interrupts on both RV32 and RV64. > > Signed-off-by: Anup Patel > Signed-off-by: Anup Patel > Reviewed-by: Alistair Francis > --- > target/risc

[PATCH v6 10/23] target/riscv: Implement AIA CSRs for 64 local interrupts on RV32

From: Anup Patel The AIA specification adds new CSRs for RV32 so that RISC-V hart can support 64 local interrupts on both RV32 and RV64. Signed-off-by: Anup Patel Signed-off-by: Anup Patel Reviewed-by: Alistair Francis --- target/riscv/cpu.h| 14 +- target/riscv/cpu_helper.c | 10 +