Re: [PATCH v6 00/14] tcg/riscv: Add support for vector

2024-10-22 Thread LIU Zhiwei
On 2024/10/21 09:42, Alistair Francis wrote: On Thu, Oct 17, 2024 at 5:33 AM Richard Henderson wrote: Introduce support for the RISC-V vector extension in the TCG backend. v5: https://lore.kernel.org/qemu-devel/20241007025700.47259-1-zhiwei_...@linux.alibaba.com/ Changes for v6: - Fix p

Re: [PATCH v6 00/14] tcg/riscv: Add support for vector

2024-10-20 Thread Alistair Francis
On Thu, Oct 17, 2024 at 5:33 AM Richard Henderson wrote: > > Introduce support for the RISC-V vector extension in the TCG backend. > > v5: > https://lore.kernel.org/qemu-devel/20241007025700.47259-1-zhiwei_...@linux.alibaba.com/ > > Changes for v6: > - Fix problem with TB overflow restart wrt t

Re: [PATCH v6 00/14] tcg/riscv: Add support for vector

2024-10-16 Thread TangTianCheng
Signed-off-by: Huang Shiyuan Co-authored-by: TANG Tiancheng Signed-off-by: TANG Tiancheng Reviewed-by: Liu Zhiwei Reviewed-by: Richard Henderson Signed-off-by: Swung0x48 Hi, We should remove the tag "Signed-off-by: swung0x48swung0...@outlook.com" since the author's real name, Huang Shiyuan, is

[PATCH v6 00/14] tcg/riscv: Add support for vector

2024-10-16 Thread Richard Henderson
Introduce support for the RISC-V vector extension in the TCG backend. v5: https://lore.kernel.org/qemu-devel/20241007025700.47259-1-zhiwei_...@linux.alibaba.com/ Changes for v6: - Fix problem with TB overflow restart wrt the constant pool. - Fix vsetivli disassembly. - Change set_vtype to