On 23/07/24 10:43, Nicholas Piggin wrote:
On Thu Jun 6, 2024 at 10:16 PM AEST, Aditya Gupta wrote:
Introduce 'PnvChipClass::logical_pvr' to know corresponding logical PVR
of a PowerPC CPU.
This helps to have a one-to-one mapping between PVR and logical PVR for
a CPU, and used in a later commit
On Thu Jun 6, 2024 at 10:16 PM AEST, Aditya Gupta wrote:
> Introduce 'PnvChipClass::logical_pvr' to know corresponding logical PVR
> of a PowerPC CPU.
> This helps to have a one-to-one mapping between PVR and logical PVR for
> a CPU, and used in a later commit to handle cases where PCR of two
> gen
Introduce 'PnvChipClass::logical_pvr' to know corresponding logical PVR
of a PowerPC CPU.
This helps to have a one-to-one mapping between PVR and logical PVR for
a CPU, and used in a later commit to handle cases where PCR of two
generations of Power chip is same, which causes regressions with compa
