Re: [PATCH v5 1/1] target/riscv: Add RVV registers to log

2023-07-02 Thread Alistair Francis
On Thu, Jun 29, 2023 at 6:39 PM Ivan Klokov wrote: > > Print RvV extension register to log if VPU option is enabled. > > Signed-off-by: Ivan Klokov Thanks! Applied to riscv-to-apply.next Alistair > --- > v5: >- Fix typo, move macros out of function, direct access to cfg.vlen field. > ---

Re: [PATCH v5 1/1] target/riscv: Add RVV registers to log

2023-07-02 Thread Alistair Francis
On Thu, Jun 29, 2023 at 6:39 PM Ivan Klokov wrote: > > Print RvV extension register to log if VPU option is enabled. > > Signed-off-by: Ivan Klokov Reviewed-by: Alistair Francis Alistair > --- > v5: >- Fix typo, move macros out of function, direct access to cfg.vlen field. > --- > target

Re: [PATCH v5 1/1] target/riscv: Add RVV registers to log

2023-06-29 Thread Daniel Henrique Barboza
On 6/29/23 05:37, Ivan Klokov wrote: Print RvV extension register to log if VPU option is enabled. Signed-off-by: Ivan Klokov --- v5: - Fix typo, move macros out of function, direct access to cfg.vlen field. --- Reviewed-by: Daniel Henrique Barboza target/riscv/cpu.c | 57

[PATCH v5 1/1] target/riscv: Add RVV registers to log

2023-06-29 Thread Ivan Klokov
Print RvV extension register to log if VPU option is enabled. Signed-off-by: Ivan Klokov --- v5: - Fix typo, move macros out of function, direct access to cfg.vlen field. --- target/riscv/cpu.c | 57 +- 1 file changed, 56 insertions(+), 1 deletion(