Re: [PATCH v5 03/60] target/riscv: support vector extension csr

2020-03-13 Thread Richard Henderson
On 3/12/20 7:58 AM, LIU Zhiwei wrote: > The v0.7.1 specification does not define vector status within mstatus. > A future revision will define the privileged portion of the vector status. > > Signed-off-by: LIU Zhiwei > --- > target/riscv/cpu_bits.h | 15 + > target/riscv/csr.c | 75

Re: [PATCH v5 03/60] target/riscv: support vector extension csr

2020-03-12 Thread Alistair Francis
On Thu, Mar 12, 2020 at 8:05 AM LIU Zhiwei wrote: > > The v0.7.1 specification does not define vector status within mstatus. > A future revision will define the privileged portion of the vector status. > > Signed-off-by: LIU Zhiwei Reviewed-by: Alistair Francis Alistair > --- > target/riscv/

[PATCH v5 03/60] target/riscv: support vector extension csr

2020-03-12 Thread LIU Zhiwei
The v0.7.1 specification does not define vector status within mstatus. A future revision will define the privileged portion of the vector status. Signed-off-by: LIU Zhiwei --- target/riscv/cpu_bits.h | 15 + target/riscv/csr.c | 75 - 2 files