On Thu, Dec 17, 2020 at 9:25 AM Palmer Dabbelt wrote:
>
> On Thu, 17 Dec 2020 05:58:11 PST (-0800), richard.hender...@linaro.org wrote:
> > On 12/17/20 12:44 AM, Bin Meng wrote:
> >> What happens if something like ARM big.LITTLE needs to be supported on
> >> RISC-V?
> >
> > I'd say it's the board
On Thu, 17 Dec 2020 05:58:11 PST (-0800), richard.hender...@linaro.org wrote:
On 12/17/20 12:44 AM, Bin Meng wrote:
What happens if something like ARM big.LITTLE needs to be supported on RISC-V?
I'd say it's the board's job to pass the boot heart.
(Though even big.LITTLE doesn't mix 64 and 32-
On 12/17/20 12:44 AM, Bin Meng wrote:
> What happens if something like ARM big.LITTLE needs to be supported on RISC-V?
I'd say it's the board's job to pass the boot heart.
(Though even big.LITTLE doesn't mix 64 and 32-bit cores.)
r~
On Thu, Dec 17, 2020 at 2:23 AM Alistair Francis
wrote:
>
> Instead of using string compares to determine if a RISC-V machine is
> using 32-bit or 64-bit CPUs we can use the initalised CPUs. This avoids
> us having to maintain a list of CPU names to compare against.
>
> This commit also fixes the
On 12/16/20 12:23 PM, Alistair Francis wrote:
> Instead of using string compares to determine if a RISC-V machine is
> using 32-bit or 64-bit CPUs we can use the initalised CPUs. This avoids
> us having to maintain a list of CPU names to compare against.
>
> This commit also fixes the name of the
Instead of using string compares to determine if a RISC-V machine is
using 32-bit or 64-bit CPUs we can use the initalised CPUs. This avoids
us having to maintain a list of CPU names to compare against.
This commit also fixes the name of the function to match the
riscv_cpu_is_32bit() function.
Si
