Re: [PATCH v4 1/4] target/sh4: Fix ADDV opcode

2024-05-01 Thread Yoshinori Sato
On Wed, 01 May 2024 01:31:22 +0900, Philippe Mathieu-Daudé wrote: > > The documentation says: > > ADDV Rm, RnRn + Rm -> Rn, overflow -> T > > But QEMU implementation was: > > ADDV Rm, RnRn + Rm -> Rm, overflow -> T > > Fix by filling the correct Rm register. > > Add tests

[PATCH v4 1/4] target/sh4: Fix ADDV opcode

2024-04-30 Thread Philippe Mathieu-Daudé
The documentation says: ADDV Rm, RnRn + Rm -> Rn, overflow -> T But QEMU implementation was: ADDV Rm, RnRn + Rm -> Rm, overflow -> T Fix by filling the correct Rm register. Add tests provided by Paul Cercueil. Cc: qemu-sta...@nongnu.org Fixes: ad8d25a11f ("target-sh4: impl