On Fri, 25 Aug 2023 at 13:21, Jean-Christophe Dubois
wrote:
>
> This patch adds a few unimplemented TZ devices (TZASC and CSU) to
> i.MX6UL and i.MX7 processors to avoid bare metal application to
> experiment "bus error" when acccessing these devices.
>
> It also adds some internal memory segments
This patch adds a few unimplemented TZ devices (TZASC and CSU) to
i.MX6UL and i.MX7 processors to avoid bare metal application to
experiment "bus error" when acccessing these devices.
It also adds some internal memory segments (OCRAM) to the i.MX7 to
allow bare metal application to use them.
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