On Fri, Apr 25, 2025 at 10:18 PM Ran Wang wrote:
>
> This serial adds Xiangshan Kunminghu CPU and its FPGA prototype
> platform, which include UART, CLINT, IMSIC, and APLIC
> devices.
>
> More details can be found at
> https://github.com/OpenXiangShan/XiangShan
>
> Patches based on alistair/riscv-
Hello Alistair,
Could you please comment?
I'd like to know if this version of patch set need any more work.
Thanks & Regards,
Ran
On 2025/4/25 20:17, Ran Wang wrote:
This serial adds Xiangshan Kunminghu CPU and its FPGA prototype
platform, which include UART, CLINT, IMSIC, and APLIC
devices.
This serial adds Xiangshan Kunminghu CPU and its FPGA prototype
platform, which include UART, CLINT, IMSIC, and APLIC
devices.
More details can be found at
https://github.com/OpenXiangShan/XiangShan
Patches based on alistair/riscv-to-apply.next
Huang Borong (2):
target/riscv: Add BOSC's Xiangs
