RE: [PATCH v4] intel_iommu: TM field should not be in reserved bits

2019-10-07 Thread Zhang, Qi1
twiddle.net; ehabk...@redhat.com; Qi, Yadong > > Subject: Re: [PATCH v4] intel_iommu: TM field should not be in reserved bits > > On Mon, Sep 30, 2019 at 01:04:51PM +0800, qi1.zh...@intel.com wrote: > > From: "Zhang, Qi" > > > > When dt is supported, TM f

Re: [PATCH v4] intel_iommu: TM field should not be in reserved bits

2019-10-05 Thread Michael S. Tsirkin
On Mon, Sep 30, 2019 at 01:04:51PM +0800, qi1.zh...@intel.com wrote: > From: "Zhang, Qi" > > When dt is supported, TM field should not be Reserved(0). > > Refer to VT-d Spec 9.8 > > Signed-off-by: Zhang, Qi > Signed-off-by: Qi, Yadong I am guessing this is really a 2 patch series right? So y

[PATCH v4] intel_iommu: TM field should not be in reserved bits

2019-09-29 Thread qi1 . zhang
From: "Zhang, Qi" When dt is supported, TM field should not be Reserved(0). Refer to VT-d Spec 9.8 Signed-off-by: Zhang, Qi Signed-off-by: Qi, Yadong --- hw/i386/intel_iommu.c | 12 hw/i386/intel_iommu_internal.h | 17 + 2 files changed, 21 insertions(+)